This technology employs a novel reading method for STT-RAM cells by utilizing a controlled external magnetic field to temporarily modify the magnetic tunneling junction’s state. In practice, the cell is initially read in its natural state while its voltage is recorded. An external magnetic field is then applied via a current-carrying wire, which gently rotates the free layer’s magnetization to an intermediate state without fully switching it. A second voltage measurement is taken during this state and, after the field is removed, the cell reverts to its original form. A differential sense amplifier compares the two voltage readings to accurately discern high or low resistance states. This non-destructive approach streamlines operations while minimizing process-induced variances.
Description
The method is differentiated by its innovative use of a controlled magnetic field to generate a reliable self-reference state, eliminating the need for additional matched reference cells or destructive read operations. Its ability to achieve a high sense margin enhances read reliability and reduces error probability. Combined with minimal fabrication overhead and simplified circuitry, this technology stands out by delivering high performance and improved energy efficiency in STT-RAM applications.
Applications
High-reliability nonvolatile memory
Energy-efficient memory storage
Embedded system low-power memory
On-chip STT-RAM design
Advantages
High tolerance to process variations for enhanced reliability
Significant sense margin that reduces read error probability
Non-destructive read operation that preserves original data
Low implementation overhead with minimal added circuitry
Simplified design avoiding complex voltage dividers and error corrections
IP Status
https://patents.google.com/patent/US9627024B2
