High-resolution and high-efficiency microdisplays are critical components of wearable electronics such as smart glasses, but developing a low-power, high-brightness pixel technology has proven difficult. For example, a liquid crystal on silicon (LCoS) display requires an external light source that constantly draws significant current, whereas a micro-organic-light-emitting-diode (μ-OLED) display offers better power efficiency, but with low brightness and short lifetime. The Nano-Eclipse LED (N-LED) is expected to draw significantly less power than current microdisplays, potentially doubling battery life while also offering higher brightness, contrast, and resolution. N-LEDs also have a low material cost compared to traditional LEDs, and size can be scaled down to the nanometer range.
Description
The N-LED consists of five layers: a silicon-based electron supply layer, a quantum-dot emissive layer, a polymer hole layer, and an anode layer. When voltage is applied to the supply layer, a dense electron gas is formed at the junction with the next layer. The electrons repel each other and are forced into the next layer above. The turn-on voltage required to achieve bright illumination is very low (~1-2V), and because illumination is greatest at the periphery of each emitter, efficiency improves as size shrinks, encouraging scalability. Nanometer-sized perforations are currently achievable using electron beam lithography and we ultimately expect to generate sub-nanometer LEDs containing a single quantum dot. This technology can be used as a silicon-based single-photon source on demand, which will be important for future quantum information technology.
Applications
• Near-eye displays such as camera viewfinders, head-mounted displays, and smart glasses
• Quantum computing
Advantages
• Lower power consumption compared to current microdisplay technology
• Low material cost
• High brightness, color contrast, and resolution
• Long lifespan
• Scalable to nanometer and sub-nanometer range
• Compatible with electronic chips
Invention Readiness
Light emission and low voltage operation confirmed; currently optimizing hole-spacing and charge-conducting layer to achieve theoretical efficiency.
IP Status
https://patents.google.com/patent/US9331189B2; https://patents.google.com/patent/US11730005B2
